Description
This book discusses the latest advancements in machine learning and related algorithms, including their hardware implementations and accelerations, as well as the current and future implications for our lives. The hardware implementation viewpoint, including processor speed and power consumption, is covered in this book. The acceleration of machine learning algorithms by hardware and the enhancement of hardware performance standards for certain algorithms come next. The first section discusses how machine learning algorithms like Random Forest, Naïve Bayes, and Convolutional Neural Network have recently benefited from hardware acceleration. The hardware acceleration of additional algorithms, including SHA-3, Lagrange Relaxation, and Brent Kung, is covered in the second section. For anyone looking to explore, innovate, and collaborate further in the fascinating topic of VLSI and embedded computing architecture design, this book is an invaluable resource for researchers, practitioners, and students interested in hardware design, implementation, and acceleration.
